VHDL PROGRAM FOR NOR GATE

NOR GATE

Library IEEE;

    use IEEE.std_logic_1164.all;

   

    entity nor_gate is

    port(a,b:in bit;

        y:out bit);

   end nor_gate;

       

        architecture nor_gate_D of nor_gate is

            begin

                y <= a nor b;

            end nor_gate_D;