HSPICE CODE FOR NOR GATE USING CMOS

CMOS NOR GATE
VDD 1 0 5
VINA A 0 PULSE 0 5 0 1N 1N 20N 40N
VINB B 0 PULSE 0 5 0 1N 1N 40N 80N
MP0 2 A 1 1 MP L=1U W=3U
MN0 OUT A 0 0 MN L=1U W=1U
MP1 OUT B 2 2 MP L=1U W=3U
MN1 OUT B 0 0 MN L=1U W=1U
.MODEL MN NMOS
.MODEL MP PMOS
.TRAN 200P 80N
.OP ALL
.PRINT TRAN V(A) V(B) V(OUT)
.END

HSPICE CODE FOR NAND GATE USING CMOS

CMOS NAND GATE
VDD 1 0 5

VINA A 0 PULSE 0 5 0 1N 2N 20N 40N
VINB B 0 PULSE 0 5 0 1N 2N 40N 80N

MP2 OUT A 1 1 PM L=1U W=3U
MN2 OUT A 2 2 NM L=1U W=1U
MP1 OUT B 1 1 PM L=1U W=3U
MN1 2 B 0 0 NM L=1U W=1U
.MODEL PM PMOS
.MODEL NM NMOS
.OP ALL
.TRAN 200P 80N
.PRINT TRAN V(A) V(B) V(OUT)
.END

HSPICE CODE FOR HALF ADDER USING CMOS

CMOS HALD ADDER
VDD 1 0 5
.GLOBAL 1
VINA A 0 PULSE 0 5 0 1N 2N 20N 40N
VINB B 0 PULSE 0 5 0 1N 2N 40N 80N

.MACRO INV IN OUT
MP0 OUT IN 1 1 PM L=1U W=3U
MN0 OUT IN 0 0 NM L=1U W=1U
.EOM

.MACRO NAND A B OUT
MP1 OUT A 1 1 PM L=1U W=3U
MP2 OUT B 1 1 PM L=1U W=3U
MN1 OUT A 2 2 NM L=1U W=1U
MN2 2 B 0 0 NM L=1U W=1U
.EOM

.MACRO AND A B OUT
X1 A B OUT1 NAND
X2 OUT1 OUT INV
.EOM

.MACRO XOR A ABAR B BBAR OUT
MP3 3 ABAR 1 1 PM L=1U W=3U
MP4 3 BBAR 1 1 PM L=1U W=3U
MP5 OUT A 3 3 PM L=1U W=3U
MP6 OUT B 3 3 PM L=1U W=3U
MN3 OUT ABAR 4 4 NM L=1U W=1U
MN4 4 BBAR 0 0 NM L=1U W=1U
MN5 OUT A 5 5 NM L=1U W=1U
MN6 5 B 0 0 NM L=1U W=1U
.EOM

.MACRO HALFADDER A B SUM CARRY
X3 A ABAR INV
X4 B BBAR INV
X5 A ABAR B BBAR SUM XOR
X6 A B CARRY AND
.EOM


X7 A B SUM CARRY HALFADDER

.MODEL PM PMOS
.MODEL NM NMOS
.OP ALL
.TRAN 200P 80N
.PRINT TRAN V(A) V(B) V(SUM) V(CARRY)
.END
 

HSPICE CODE FOR FULL ADDER USING CMOS

CMOS FULL ADDER
VDD 1 0 5
.GLOBAL 1
VINA A 0 PULSE 0 5 0 1N 2N 20N 40N
VINB B 0 PULSE 0 5 0 1N 2N 40N 80N
VINC C 0 PULSE 0 5 0 1N 2N 80N 160N

.MACRO INV IN OUT
MP0 OUT IN 1 1 PM L=1U W=3U
MN0 OUT IN 0 0 NM L=1U W=1U
.EOM

.MACRO NAND A B OUT
MP1 OUT A 1 1 PM L=1U W=3U
MP2 OUT B 1 1 PM L=1U W=3U
MN1 OUT A 2 2 NM L=1U W=1U
MN2 2 B 0 0 NM L=1U W=1U
.EOM

.MACRO AND A B OUT
X1 A B OUT1 NAND
X2 OUT1 OUT INV
.EOM

.MACRO XOR A ABAR B BBAR OUT
MP3 3 ABAR 1 1 PM L=1U W=3U
MP4 3 BBAR 1 1 PM L=1U W=3U
MP5 OUT A 3 3 PM L=1U W=3U
MP6 OUT B 3 3 PM L=1U W=3U
MN3 OUT ABAR 4 4 NM L=1U W=1U
MN4 4 BBAR 0 0 NM L=1U W=1U
MN5 OUT A 5 5 NM L=1U W=1U
MN6 5 B 0 0 NM L=1U W=1U
.EOM

.MACRO NOR A B OUT
MP1 2 A 1 1 PM L=1U W=3U
MP2 OUT B 2 2 PM L=1U W=3U
MN1 OUT A 0 0 NM L=1U W=1U
MN2 OUT B 0 0 NM L=1U W=1U
.EOM

.MACRO OR A B OUT
X9 A B OUT1 NOR
X10 OUT1 OUT INV
.EOM

.MACRO HALFADDER A B SUM CARRY
X3 A ABAR INV
X4 B BBAR INV
X5 A ABAR B BBAR SUM XOR
X6 A B CARRY AND
.EOM

.MACRO FULLADDER A B C SUM CARRY

X7 A B SUM1 CARRY1 HALFADDER
X8 SUM1 C SUM CARRY2 HALFADDER
X11 CARRY1 CARRY2 CARRY OR

.EOM

X12 A B C SUM CARRY FULLADDER

.MODEL PM PMOS
.MODEL NM NMOS
.OP ALL
.TRAN 200P 160N
.PRINT TRAN V(A) V(B) V(C) V(SUM) V(CARRY)
.END
 

HSPICE CODE FOR CMOS MULTIPLIER

CMOS MULTIPLIER
VDD 1 0 5
.GLOBAL 1


***********INPUTS********************
VINA0 A0 0 PULSE 0 5 0 1N 2N 10N 20N
VINB0 B0 0 PULSE 0 5 0 1N 2N 10N 20N

VINA1 A1 0 PULSE 0 5 0 1N 2N 20N 40N
VINB1 B1 0 PULSE 0 5 0 1N 2N 20N 40N

VINA2 A2 0 PULSE 0 5 0 1N 2N 40N 80N
VINB2 B2 0 PULSE 0 5 0 1N 2N 40N 80N

VINA3 A3 0 PULSE 0 5 0 1N 2N 80N 160N
VINB3 B3 0 PULSE 0 5 0 1N 2N 80N 160N
***************************************

************PP*************************
XAND0 A0 B0 OUT0 AND
XAND1 A1 B0 P1 AND
XAND2 A2 B0 P2 AND
XAND3 A3 B0 P3 AND
XAND4 A0 B1 P4 AND
XAND5 A1 B1 P5 AND
XAND6 A2 B1 P6 AND
XAND7 A3 B1 P7 AND
XAND8 A0 B2 P8 AND
XAND9 A1 B2 P9 AND
XAND10 A2 B2 P10 AND
XAND11 A3 B2 P11 AND
XAND12 A0 B3 P12 AND
XAND13 A1 B3 P13 AND
XAND14 A2 B3 P14 AND
XAND15 A3 B3 P15 AND
*********************************************


XHA1 P1 P4 OUT1 P16 HALFADDER
XFA1 P2 P5 P16 P17 P18 FULLADDER
XFA2 P3 P6 P18 P19 P20 FULLADDER
XHA2 P20 P7 P21 P22 HALFADDER
XHA3 P17 P8 OUT2 P23 HALFADDER
XFA3 P9 P19 P23 P24 P25 FULLADDER
XFA4 P10 P21 P25 P26 P27 FULLADDER
XFA5 P11 P22 P27 P28 P29 FULLADDER
XHA4 P24 P12 OUT3 P30 HALFADDER
XFA6 P13 P26 P30 OUT4 P40 FULLADDER
XFA7 P14 P28 P40 OUT5 P41 FULLADDER
XFA8 P15 P29 P41 OUT6 OUT7 FULLADDER



********INVERTER***************************
.MACRO INV IN OUT
MP0 OUT IN 1 1 PM L=1U W=3U
MN0 OUT IN 0 0 NM L=1U W=1U
.EOM
********************************************

************NAND GATE**********************

.MACRO NAND A B OUT
MP1 OUT A 1 1 PM L=1U W=3U
MP2 OUT B 1 1 PM L=1U W=3U
MN1 OUT A 2 2 NM L=1U W=1U
MN2 2 B 0 0 NM L=1U w=1U
.EOM
*******************************************

************AND GATE***********************
.MACRO AND A B OUT
X1 A B OUT1 NAND
X2 OUT1 OUT INV
.EOM

*******************************************

***************XOR GATE********************

.MACRO XOR A ABAR B BBAR OUT
MP3 3 ABAR 1 1 PM L=1U W=3U
MP4 3 BBAR 1 1 PM L=1U W=3U
MP5 OUT A 3 3 PM L=1U W=3U
MP6 OUT B 3 3 PM L=1U W=3U
MN3 OUT ABAR 4 4 NM L=1U W=1U
MN4 4 BBAR 0 0 NM L=1U W=1U
MN5 OUT A 5 5 NM L=1U W=1U
MN6 5 B 0 0 NM L=1U W=1U
.EOM
*******************************************

************NOR GATE***********************
.MACRO NOR A B OUT
MP1 2 A 1 1 PM L=1U W=3U
MP2 OUT B 2 2 PM L=1U W=3U
MN1 OUT A 0 0 NM L=1U W=1U
MN2 OUT B 0 0 NM L=1U W=1U
.EOM
*******************************************

****************OR GATE*************************

.MACRO OR A B OUT
X9 A B OUT1 NOR
X10 OUT1 OUT INV
.EOM
************************************************

*********HALF ADDER*****************************
.MACRO HALFADDER A B SUM CARRY
X3 A ABAR INV
X4 B BBAR INV
X5 A ABAR B BBAR SUM XOR
X6 A B CARRY AND
.EOM
*************************************************

*******************FULL ADDER********************

.MACRO FULLADDER A B C SUM CARRY

X7 A B SUM1 CARRY1 HALFADDER
X8 SUM1 C SUM CARRY2 HALFADDER
X11 CARRY1 CARRY2 CARRY OR

.EOM

*************************************************


.MODEL PM PMOS
.MODEL NM NMOS
.OP ALL
.TRAN 20N 160N
.PRINT TRAN V(A0) V(A1) V(A2) V(A3) V(B0) V(B1) V(B2) V(B3) V(OUT0) V(OUT1) V(OUT2) V(OUT3) V(OUT4) V(OUT5) V(OUT6) V(OUT7)

.END
 

HSPICE CODE FOR INVERTER

CMOS INVERTER
MP OUT IN 1 1 PM L=1U W=3U
MN OUT IN 0 0 NM L=1U W=1U
VDD 1 0 5
VIN IN 0 PULSE 0 5 2N 0N 0N 5N 20N
.MODEL PM PMOS
.MODEL NM NMOS
.OP ALL
.TRAN 200P 20N
.PRINT TRAN V(IN) V(OUT)
.END

HSPICE CODE FOR BUFFER

CMOS BUFFER
VDD 2 0 5
VIN IN 0 PULSE 0 5 2N 1N 1N 20N 20N
MP0 1 IN 2 2 PM L=1U W=3U
MNO 1 IN 0 0 NM L=1U W=1U
MP1 OUT 1 2 2 PM L=1U W=3U
MN1 OUT 1 0 0 NM L=1U W=1U
.OP ALL
.TRAN 200P 80N
.MODEL PM PMOS
.MODEL NM NMOS
.PRINT TRAN V(IN) V(OUT)
.PROBE TRAN V(IN) V(OUT)
.END

HSPICE CODE FOR AND GATE

CMOS AND GATE
.GLOBAL 1
VDD 1 0 5

VINA A 0 PULSE 0 5 0 1N 1N 20N 40N
VINB B 0 PULSE 0 5 0 1N 1N 40N 80N


.MACRO INVERTER IN OUT
MP3 OUT IN 1 1 PM L=1U W=3U
MN3 OUT IN 0 0 NM L=1U W=1U
.EOM


MP1 OUT1 A 1 1 PM L=1U W=3U
MN1 OUT1 A 2 2 NM L=1U W=1U
MP2 OUT1 B 1 1 PM L=1U W=3U
MN2 2 B 0 0 NM L=1U W=1U


X11 OUT1 OUT INVERTER


.OP ALL
.MODEL PM PMOS
.MODEL NM NMOS
.TRAN 200P 80N
.PRINT TRAN V(A) V(B) V(OUT)
.END