CMOS HALD ADDER
VDD 1 0 5
.GLOBAL 1
VINA A 0 PULSE 0 5 0 1N 2N 20N 40N
VINB B 0 PULSE 0 5 0 1N 2N 40N 80N
.MACRO INV IN OUT
MP0 OUT IN 1 1 PM L=1U W=3U
MN0 OUT IN 0 0 NM L=1U W=1U
.EOM
.MACRO NAND A B OUT
MP1 OUT A 1 1 PM L=1U W=3U
MP2 OUT B 1 1 PM L=1U W=3U
MN1 OUT A 2 2 NM L=1U W=1U
MN2 2 B 0 0 NM L=1U W=1U
.EOM
.MACRO AND A B OUT
X1 A B OUT1 NAND
X2 OUT1 OUT INV
.EOM
.MACRO XOR A ABAR B BBAR OUT
MP3 3 ABAR 1 1 PM L=1U W=3U
MP4 3 BBAR 1 1 PM L=1U W=3U
MP5 OUT A 3 3 PM L=1U W=3U
MP6 OUT B 3 3 PM L=1U W=3U
MN3 OUT ABAR 4 4 NM L=1U W=1U
MN4 4 BBAR 0 0 NM L=1U W=1U
MN5 OUT A 5 5 NM L=1U W=1U
MN6 5 B 0 0 NM L=1U W=1U
.EOM
.MACRO HALFADDER A B SUM CARRY
X3 A ABAR INV
X4 B BBAR INV
X5 A ABAR B BBAR SUM XOR
X6 A B CARRY AND
.EOM
X7 A B SUM CARRY HALFADDER
.MODEL PM PMOS
.MODEL NM NMOS
.OP ALL
.TRAN 200P 80N
.PRINT TRAN V(A) V(B) V(SUM) V(CARRY)
.END
VDD 1 0 5
.GLOBAL 1
VINA A 0 PULSE 0 5 0 1N 2N 20N 40N
VINB B 0 PULSE 0 5 0 1N 2N 40N 80N
.MACRO INV IN OUT
MP0 OUT IN 1 1 PM L=1U W=3U
MN0 OUT IN 0 0 NM L=1U W=1U
.EOM
.MACRO NAND A B OUT
MP1 OUT A 1 1 PM L=1U W=3U
MP2 OUT B 1 1 PM L=1U W=3U
MN1 OUT A 2 2 NM L=1U W=1U
MN2 2 B 0 0 NM L=1U W=1U
.EOM
.MACRO AND A B OUT
X1 A B OUT1 NAND
X2 OUT1 OUT INV
.EOM
.MACRO XOR A ABAR B BBAR OUT
MP3 3 ABAR 1 1 PM L=1U W=3U
MP4 3 BBAR 1 1 PM L=1U W=3U
MP5 OUT A 3 3 PM L=1U W=3U
MP6 OUT B 3 3 PM L=1U W=3U
MN3 OUT ABAR 4 4 NM L=1U W=1U
MN4 4 BBAR 0 0 NM L=1U W=1U
MN5 OUT A 5 5 NM L=1U W=1U
MN6 5 B 0 0 NM L=1U W=1U
.EOM
.MACRO HALFADDER A B SUM CARRY
X3 A ABAR INV
X4 B BBAR INV
X5 A ABAR B BBAR SUM XOR
X6 A B CARRY AND
.EOM
X7 A B SUM CARRY HALFADDER
.MODEL PM PMOS
.MODEL NM NMOS
.OP ALL
.TRAN 200P 80N
.PRINT TRAN V(A) V(B) V(SUM) V(CARRY)
.END
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