VHDL PROGRAM FOR BINARY TO BCD CONVERTER

BCD

 Library IEEE;

    use IEEE.std_logic_1164.all;

    entity bcd is

    port(a,b,c,d:in bit;

        b0,b1,b2,b3,b4:out bit);

    end bcd;

    architecture bcd_D of bcd is

        begin

            b0 <= (b and d) or (c and d);

            b1 <= (not b) and (not c) and d;

            b2 <= (b and c) or (c and (not d));

            b3 <=  ((not b) and c and d) or (b and (not d));

            b4 <= a;

        end bcd_D;