Tuesday, March 28, 2017

VHDL PROGRAM FOR NAND GATE



NAND GATE
Library IEEE;
    use IEEE.std_logic_1164.all;
   
    entity nand_gate is
    port(a,b:in bit;
        y:out bit);
    end nand_gate;
   
    architecture nand_gate_D of nand_gate is
        begin
        y <= a nand b;
    end nand_gate_D;

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