XNOR GATE
Library IEEE;
use
IEEE.std_logic_1164.all;
entity xnor_gate
is
port(a,b:in
bit;
y:out
bit);
end
xnor_gate;
architecture
xnor_gate_D of xnor_gate is
begin
y <= a xnor b;
end
xnor_gate_D;
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