Verilog Program for 8-bit Ripple Carry Adder

module RCA8(cout,s,cin,a,b);
    input[7:0]a;
    input[7:0]b;
    input cin;
    output[7:0]s;
    output cout;
    wire c1,c2,c3,c4,c5,c6,c7,c8;
    full_adder a1(c1,s[0],a[0],b[0],cin);
    full_adder a2(c2,s[1],a[1],b[1],c2);
    full_adder a3(c3,s[2],a[2],b[2],c3);
    full_adder a4(c4,s[3],a[3],b[3],c4);
    full_adder a5(c5,s[4],a[4],b[4],c5);
    full_adder a6(c6,s[5],a[5],b[5],c6);
    full_adder a7(c7,s[6],a[6],b[6],c7);
    full_adder a8(c8,s[7],a[7],b[7],cout);
endmodule;